Part Number Hot Search : 
10013 AM3406N AD9224 SY100E31 LM111 LM111 ADG453 B84102C
Product Description
Full Text Search
 

To Download MAX8939 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  19-5843; rev 5; 12/12 typical operating circuit appears at end of data sheet. general description the MAX8939/MAX8939a/MAX8939b power manage - ment ics contain the necessary supplies and features for supporting cell phone designs based on the intel mobile communications (imc) 61xx 3g platform. designed to power all peripheral components in the platform, the ics also provide the necessary signals to control the 61xx baseband processor. the integrated lithium-ion (li+) charger is protected up to 28v input and features a protected output voltage for supply of a usb transceiver. proprietary thermal- regulation circuitry limits the die temperature during fast-charging or when the ics are exposed to high ambi - ent temperatures, allowing maximum charging current without damaging the ics. a dedicated current regulator is included for driving a charge indicator led. four programmable low-noise, low-dropout linear regu - lators (ldos) provide the supply for noise sensitive peripherals. a high power vibrator driver is i 2 c program- mable in 70 pwm levels and 4 output voltages. the ics also offer two step-up converters; one high power, low voltage (5v) to supply an external audio amplifier or camera flash, and a high voltage (28v) supply for the display and keyboard backlight. two integrated 25ma current regulators provide independent ramp-up and ramp-down control, programmable through i 2 c. the MAX8939/MAX8939a/MAX8939b are highly integrated ics that require very few external components and are avail - able in a compact 2.5mm x 3.0mm, 0.65mm max height wafer level package (wlp). applications companion chip for cell phones/smartphones features s step-up converter 700ma guaranteed output current i 2 c programmable output 3.5v to 5.0v in 16 steps over 90% efficiency on-chip fet and synchronous rectifier fixed 2mhz pwm switching small 2.2h to 10h inductor s wled boost converter 28v max step-up output voltage 60ma output current integrated nmos power switch over 90% efficiency fixed 2mhz switching small 4.7h to 10h inductor two 25ma individually programmable current regulators i 2 c programmable output current (50a to 25.25ma) with 128-step pseudo log dimming individually programmable ramp (up/down) timers low dropout (150mv max) s linear one-cell li+ battery charger no external mosfet, reverse blocking diode, or current-sense resistor programmable fast-charge current (1.5a rms max for the MAX8939 or 850ma rms max for the MAX8939a/MAX8939b) programmable top-off current threshold proprietary die temperature regulation control 4.1v to 10v input voltage range (MAX8939) 4.1v to 6.25v input voltage range (MAX8939a/ MAX8939b) with input overvoltage protection up to 28v low-dropout voltage (300mv at 500ma) input power-source detection output input overvoltage protected 4.75v output (safe_out) from in charge current monitor output indicator led hardware input enable 5s watchdog feature during charge s four low-noise ldos 1x 400ma, 2 x 200ma and 1x 100ma output current high 65db (typ) psrr low noise (45v rms typ) 1.7v to 3.2v programmable output voltage low quiescent current (25a typ) 400ma ldo with hardware enable input s vibrator driver guaranteed 200ma output current programmable output voltage 1.3v to v invib repetition frequency 23.8khz pwm speed control in 70 steps active stop brake s control interface for 61xx baseband MAX8939/MAX8939a/MAX8939b control through i 2 c reset_in reset input charger detect pwr_on_cmp output irq interrupt output s 2.9v to 5.5v supply voltage range s thermal shutdown +denotes a lead(pb)-free/rohs-compliant package. t = tape and reel. ordering information part temp range pin-package MAX8939ewv+t -40nc to +85nc 30 wlp (0.5mm pitch) MAX8939aewv+t -40nc to +85nc 30 wlp (0.5mm pitch) MAX8939bewv+t -40nc to +85nc 30 wlp (0.5mm pitch) for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maximintegrated.com. system power management for mobile handset MAX8939/MAX8939a/MAX8939b evaluation kit available
2 stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. batt, out1, safe_out, and invib to agnd .... -0.3v to +6.0v chg_in, out2, led1, and led2 to agnd ......... -0.3v to +30v led3 and chg_mon to agnd .... -0.3v to (v safe_out + 0.3v) comp2, irq, reset_in, comp1, scl, sda, chg, pwr_on_cmp, ref, ldo1, ldo2, ldo3, ldo4, and ldo1_en to agnd .................... -0.3v to (v batt + 0.3v) outvib to agnd .................................. -0.3v to (v invib + 0.3v) pgnd1 and pgnd2 to agnd ............................. -0.3v to +0.3v lx1, lx2 current (note 1) ............................................. 1.7a rms continuous power dissipation (t a = +70nc) wlp (derate 24.4mw/nc above +70nc) .......................... 1.9w operating temperature ...................................... -40nc to +85nc junction temperature ..................................................... +150nc storage temperature range ............................ -65nc to +150nc soldering temperature (reflow) ...................................... +260nc electrical characteristics (note 3) (v batt = 3.7v, v chg_in = 5.0v, circuit of figure 1, t a = -40nc to +85nc, unless otherwise noted. typical values are at t a = +25nc.) absolute maximum ratings note 1: lx1 has internal clamp diodes to pgnd1 and out1. lx2 has internal clamp diodes to pgnd2 and out2. applications that forward bias these diodes should take care not to exceed the ic package power dissipation limit. wlp junction-to-ambient thermal resistance ( q ja ) .......... 41c/w note 2: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four-lay - er board. for detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. package thermal characteristics (note 2) parameter conditions min typ max units batt batt operating voltage 2.9 5.5 v batt shutdown supply current all outputs off, i 2 c disabled, v scl = v sda = v reset_in = 0v t a = +25nc 0.4 1 fa t a = +85nc 0.4 1 batt standby supply current all outputs off, v scl = v sda = v reset_in = 1.8v, i 2 c ready t a = +25nc 5 10 fa t a = +85nc 5 batt biasing supply current i 2 c ready, one or more outputs on 60 fa undervoltage lockout (uvlo) threshold batt rising 2.6 2.75 2.9 v undervoltage lockout hysteresis 100 mv thermal shutdown threshold +160 nc hysteresis 20 nc reference reference output voltage 1.200 v reference supply rejection 0.2 mv logic and control inputs input low level sda, scl, ldo1_en, chg, and reset_in 0.4 v input high level sda, scl, ldo1_en, chg, and reset_in 1.40 v logic-input current sda, scl, ldo1_en, chg, and reset_in, 0 < v in < 5.5v t a = +25nc -1 +1 fa t a = +85nc 0.1 maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
3 electrical characteristics (note 3) (continued) (v batt = 3.7v, v chg_in = 5.0v, circuit of figure 1, t a = -40nc to +85nc, unless otherwise noted. typical values are at t a = +25nc.) parameter conditions min typ max units logic and control outputs irq (open-drain output) output low voltage i irq = 2ma 0.4 v pwr_on_cmp (open-drain output) output low voltage i pwr_on_cmp = 2ma 0.4 v sda output low level i sda = 6ma 0.4 v i 2 c serial interface (v scl = v sda = 3v) (figure 15) clock frequency 400 khz bus-free time between start and stop t buf 1.3 fs hold time repeated start condition t hd_sta 0.6 fs scl low period t low 1.3 fs scl high period t high 0.6 fs setup time repeated start condition t su_sta 0.6 fs sda hold time t hd_dat 0 fs sda setup time t su_dat 100 ns maximum pulse width of spikes that must be suppressed by the input filter of both data and clk signals 50 ns setup time for stop condition t su_sto 0.6 fs chg_in input operating range 4.1 10 v chg_in current v chg_in = 28v, v batt = 4v, MAX8939a/MAX8939b 400 600 1000 fa chg_in leakage current from chg_in to batt v chg_in = 28v, v batt = 0v, MAX8939a/MAX8939b 21 80 fa reverse leakage current from batt to chg_in v chg_in = 0v, v batt = 0 to 4.2v, MAX8939a/ MAX8939b 10 fa chg_in trip point v chg_in - v batt , rising 200 300 400 mv v chg_in - v batt , falling 100 v chg_in - v batt , hysteresis 200 input undervoltage threshold (uv) MAX8939, v chg_in rising, 500mv hysteresis (typ) 3.9 4.0 4.1 v MAX8939a/MAX8939b, v chg_in rising, 900mv hysteresis (typ) 3.9 4.0 4.1 input overvoltage threshold (ovp) MAX8939, v chg_in rising, 200mv hysteresis (typ) 10.2 10.6 11 v MAX8939a/MAX8939b, v chg_in rising, 200mv hysteresis (typ) 6.25 6.5 6.75 input supply current i chg_in - i batt = 90ma 750 1500 fa shutdown input current charger disabled 500 fa maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
4 electrical characteristics (note 3) (continued) (v batt = 3.7v, v chg_in = 5.0v, circuit of figure 1, t a = -40nc to +85nc, unless otherwise noted. typical values are at t a = +25nc.) parameter conditions min typ max units chg_in to batt dropout on-resistance v chg_in = 3.7v, v batt = 3.6v 0.4 0.8 i safe_out safe_out regulated output i safe_out = 15ma, v chg_in = 5v, t a = 0nc to +85nc 4.75 4.90 5.00 v i safe_out = 15ma, v chg_in = 10v, t a = 0nc to +85nc 5.2 safe_out current limit 100 ma chg_mon i/v conversion factor monitoring voltage to charge current - fast-charge current = 450ma (note 4) 2.666 mv/ ma i/v accuracy overall range -10 +10 % output voltage 450ma charge current - fast-charge current = 450ma (note 4) 1200 mv charge monitoring range 0 1.2 v output impedance 10 20 40 ki indicator led led3 current sink v chg_in = 5v, t a = 0nc to +85nc 1.5 3 5 ma batt batt regulation voltage (MAX8939) i batt = 90ma, v batt programmed to 4.2v t a = +25nc 4.179 4.2 4.221 v t a = -40nc to +85nc 4.158 4.2 4.242 batt regulation voltage (MAX8939a) i batt = 90ma, t a = +25nc vset = 11b 4.129 4.150 4.171 v i batt = 90ma, t a = -40nc to +85nc vset = 00b 3.465 3.500 3.535 vset = 01b 3.811 3.850 3.889 vset = 10b 4.009 4.050 4.091 vset = 11b 4.108 4.150 4.192 batt regulation voltage (MAX8939b) i batt = 90ma, t a = +25nc vset = 11b 4.149 4.170 4.191 v i batt = 90ma, t a = -40nc to +85nc vset = 00b 3.465 3.500 3.535 vset = 01b 3.811 3.850 3.889 vset = 10b 4.009 4.050 4.091 vset = 11b 4.129 4.170 4.192 programmable restart fast-charge threshold from batt regulation voltage, default = disable -200 -300 -400 disable mv maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
5 electrical characteristics (note 3) (continued) (v batt = 3.7v, v chg_in = 5.0v, circuit of figure 1, t a = -40nc to +85nc, unless otherwise noted. typical values are at t a = +25nc.) parameter conditions min typ max units chg_in fast-charge current (MAX8939) (note 5) v batt = 3.5v chg_control_a.fast_charge = 000b 80 90 100 ma 001b 240 270 300 010b 400 450 500 011b 560 630 700 100b 630 765 900 101b 700 850 1000 110b 940 1020 1200 111b 1050 1275 1500 chg_in fast-charge current (MAX8939a/MAX8939b) (note 5) v batt = 3.5v chg_control_a.fast_charge = 000b 82 90 98 ma 001b 250 270 290 010b 420 450 480 011b 575 630 685 100b 695 765 835 101b 775 850 925 110b 100 120 140 111b 160 180 200 chg_in precharge current v batt = 2v 90 100 ma batt prequalification threshold voltage v batt rising hysteresis 140mv (typ) 2.5 2.55 2.6 v soft-start time ramp time to fast-charge current 2.5 ms top-off top-off threshold (% of fast-charge current) i batt falling top_off = 00b 10 % top_off = 01b 20 top_off = 10b 30 top_off = 11b (default) 0 timer timer accuracy -20 +20 % fast-charge time limit from entering fast- charge to v batt < 4.2v MAX8939 cctr = 00b (default) 60 min cctr = 01b 120 cctr = 10b 240 MAX8939a/ MAX8939b cctr = 00b (default) 24 cctr = 01b 120 cctr = 10b 240 precharge timer MAX8939 30 min MAX8939a/MAX8939b 12 maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
6 electrical characteristics (note 3) (continued) (v batt = 3.7v, v chg_in = 5.0v, circuit of figure 1, t a = -40nc to +85nc, unless otherwise noted. typical values are at t a = +25nc.) parameter conditions min typ max units top-off timer topoff_time = 00b 30 min topoff_time = 01b 60 topoff_time = 10b 120 topoff_time = 11b disable watchdog timer MAX8939 2.5 5 10 s MAX8939a/MAX8939b 15 30 45 thermal loop thermal limit temperature junction temperature when the charge current is reduced, t j rising, default value +70nc [00] +100 nc +85nc [01] +100nc [10] +115nc [11] out1 step-up dc-dc converter input voltage (v batt ) 2.9 5.5 v input supply current 2mhz switching, v out = 5v, no load 11 ma out1 voltage accuracy 500ma load t a = +25nc -3 +3 % t a = +85nc -4 +4 maximum output current v batt r 3.2v, v out1 = 5.0v 550 700 ma nfet current limit 2.0 a line regulation v batt = 2.9v to 4.2v 0.1 %/v load regulation 0 to 500ma load 0.5 %/a lx1 nfet on-resistance lx1 to pgnd1, i lx1 = 200ma 0.1 0.2 i lx1 pfet on-resistance lx1 to out1, i lx1 = -200ma 0.15 0.3 i lx1 leakage v lx1 = 5.5v t a = +25nc 0.01 5 fa t a = +85 nc 0.1 switching frequency 1.8 2 2.2 mhz maximum duty cycle 65 75 % minimum duty cycle 8 % comp discharge resistance during shutdown or uvlo 220 i vibrator programmable output voltage outvib 1ma at v batt = v invib = 5.5v, 150ma at v batt = v invib = 3.4v, default value 3 v output current 200 ma current limit v outvib = 0v 400 600 ma dropout voltage i load = 135ma, t a = +25nc 150 300 mv line regulation 3.4v p v batt = v invib < 5.5v, i load = 100ma 2.2 mv load regulation 1ma < i load < 200ma 25 mv power-supply rejection dv invib /dv outvib f = 10hz to 10khz, i load = 30ma 40 db output noise 100hz to 100khz, i load = 30ma 65 f v rms discharge time constant t off 90% to 5%, c = 1ff 0.1 ms maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
7 electrical characteristics (note 3) (continued) (v batt = 3.7v, v chg_in = 5.0v, circuit of figure 1, t a = -40nc to +85nc, unless otherwise noted. typical values are at t a = +25nc.) parameter conditions min typ max units active stop nfet on-resistance 1 i active brake on shutdown nfet on duration 85 ms ldo1 output accuracy i load = 1ma -3 +3 % maximum output current 400 ma current limit v ldo1 = 0v 600 ma dropout voltage i load = 200ma 200 400 mv line regulation 3.4v p v batt p 5.5v, i load = 100ma 2.4 mv load regulation 50fa < i load < 200ma 25 mv power-supply rejection dv ldo1 /dv batt f = 10hz to 10khz, i load = 30ma 60 db output noise voltage (rms) 100hz to 100khz, i load = 30ma 50 f v rms ground current i load = 500fa 21 fa shutdown discharge time t off 90% to 10%, c = 4.7ff 1 ms shutdown output impedance 50 80 i ldo2, ldo3 output accuracy i load = 1ma -3 +3 % maximum output current 200 ma current limit output = 0v 400 700 ma dropout voltage i load = 135ma 200 400 mv line regulation 3.4v p v batt p 5.5v, i load = 100ma 2.4 mv load regulation 50fa < i load < 200ma 25 mv power-supply rejection dv ldo_ /dv batt f = 10hz to 10khz, i load = 30ma 60 db output noise voltage (rms) 100hz to 100khz, i load = 30ma 50 f v rms ground current i load = 500fa 21 fa shutdown discharge time t off 90% to 10%, c = 1ff 1 ms shutdown output impedance 100 150 i ldo4 output accuracy i load = 1ma -3 +3 % maximum output current 100 ma current limit v ldo4 = 0v 200 400 ma dropout voltage i load = 70ma 200 400 mv line regulation 3.4v p v batt p 5.5v, i load = 50ma 2.4 mv load regulation 50fa < i load < 100ma 25 mv power-supply rejection dv ldo4 /dv batt f = 10hz to 10khz, i load = 30ma 60 db output noise 100hz to 100khz, i load = 30ma 50 f v rms ground current i load = 500fa 25 fa shutdown discharge time t off 90% to 10%, c = 1ff 1 ms shutdown output impedance 100 150 i maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
8 note 3: limits are 100% production tested at t a = +25nc, unless otherwise noted. min/max limits over the operating temperatures range and relevant supply voltage range are guaranteed by design and characterization. typical values are not guaranteed. note 4: the monitoring voltage is proportional to the charging current with a ratio depending on the programmed fast-charge cur - rent. for the current equal to the fast-charge current, the monitoring voltage is typically 1.2v. note 5: the maximum chg_in current is the typical value plus 10% for currents up 700ma and the typical value plus 15% for higher currents. note 6: led dropout voltage is defined as the led_ to ground voltage when current into led_ drops 10% from the value at v led_ = 0.5v. electrical characteristics (note 3) (continued) (v batt = 3.7v, v chg_in = 5.0v, circuit of figure 1, t a = -40nc to +85nc, unless otherwise noted. typical values are at t a = +25nc.) parameter conditions min typ max units out2 wled step-up converter input supply voltage 2.9 5.5 v input supply current 2mhz, no load 2 2.5 ma out2 leakage current t a = +25nc, v out2 = 5.5v, shutdown 0.01 1 fa t a = +85nc, v out2 = 5.5v, shutdown 0.1 5 led1, led2 current regulator dropout voltage (note 6) 25.25ma setting 200 mv led_ regulation voltage 350 mv led_ current accuracy t a = +25nc, i led_ = 25.25ma -3 +3 % t a = -40nc to +85nc, i led_ = 25.25ma -5 +5 leakage current t a = +25nc, in shutdown 0.01 1 fa t a = +85nc, in shutdown 0.1 5 lx2 nfet current limit 710 860 ma nfet on-resistance i lx2 = 200ma 0.3 0.7 i lx2 leakage current t a = +25nc, 5.5v, shutdown 0.01 1 fa t a = +85nc, 5.5v, shutdown 0.1 5 operating frequency 1.8 2 2.2 mhz maximum duty cycle v led1 or v led2 = 0.2v 90 % comp2 transconductance 20 fs soft-start charge current 60 fa discharge pulldown 20 ki protection overvoltage threshold v out2 rising 28 30 v overvoltage hysteresis 4 v open led detection 100 120 mv shorted led detection v out2 - 2.2v v out2 - 0.7v v maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
9 typical operating characteristics (v batt = 3.7v, circuit of figure 1, t a = +25nc, unless otherwise noted.) out1 step-up converter out1 efficiency vs. load current MAX8939 toc01 load current (ma) efficiency (%) 100 10 10 20 30 40 50 60 70 80 90 100 0 1 1000 v batt = 4.2v v batt = 3.7v v batt = 3.0v v out1 = 5v out1 efficiency vs. load current MAX8939 toc02 load current (ma) efficiency (%) 100 10 10 20 30 40 50 60 70 80 90 100 0 1 1000 v batt = 3.0v v out1 = 3.5v out1 voltage vs. load current MAX8939 toc03 load current (ma) output voltage (v) 600 500 300 400 200 100 4.91 4.92 4.93 4.94 4.95 4.96 4.97 4.98 4.99 5.00 4.90 0 700 v batt = 4.2v v batt = 3.7v v batt = 3.0v v out1 = 5v out1 voltage vs. battery voltage MAX8939 toc04 battery voltage (v) output voltage (v) 5.3 4.9 4.5 4.1 3.7 3.3 4.9 5.0 5.1 5.2 5.3 5.4 5.5 4.8 2.9 no load min t on mode protection mode (v out1 tracks v batt ) out1 no-load supply current vs. battery voltage MAX8939 toc05 battery voltage (v) supply current (ma) 5.3 4.9 3.7 4.1 4.5 3.3 2 4 6 8 10 12 14 16 18 20 0 2.9 v out1 = 5v out1 startup waveform MAX8939 toc06 1v/div 200ma/div 2v/div 5v v scl v out1 i l1 40s/div no load maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
10 typical operating characteristics (continued) (v batt = 3.7v, circuit of figure 1, t a = +25nc, unless otherwise noted.) out1 step-up converter (continued) light-load switching waveforms MAX8939 toc07 2v/div 100ma/div 10mv/div (ac-coupled) v out1 v lx2 i l1 200ns/div 10ma load heavy-load switching waveforms MAX8939 toc08 2v/div 500ma/div 20mv/div (ac-coupled) v out1 v lx2 i l1 200ns/div 700ma load out1 load-transient response (70ma to 700ma to 70ma) MAX8939 toc09 200ma/div 500mv/div (ac-coupled) v out1 i out1 20s/div maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
11 typical operating characteristics (continued) (v batt = 3.7v, circuit of figure 1, t a = +25nc, unless otherwise noted.) out2 white led driver led efficiency vs. battery voltage 2 strings of 5 leds MAX8939 toc10 battery voltage (v) efficiency (%) 5.3 4.9 3.7 4.1 4.5 3.3 10 20 30 40 50 60 70 80 90 100 0 2.9 10.1ma/string 25.25ma/string 1.00ma/string led efficiency vs. battery voltage 2 strings of 4 leds MAX8939 toc11 battery voltage (v) efficiency (%) 5.3 4.9 3.7 4.1 4.5 3.3 10 20 30 40 50 60 70 80 90 100 0 2.9 10.1ma/string 25.25ma/string 1.00ma/string led ramp-up waveform MAX8939 toc14 10ma/div 5v/div 2v/div v out2 v scl i led_ 40s/div 128ms setting, 0.05ma to 25.25ma led startup waveforms MAX8939 toc12 200ma/div 10ma/div 2v/div 5v/div v out2 v scl i l2 i led 20s/div no load 5v out2 switching waveforms MAX8939 toc13 100ma/div 5v/div v lx2 i l2 200ns/div driving 1 string of 5 leds at 25.25ma maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
12 typical operating characteristics (continued) (v batt = 3.7v, circuit of figure 1, t a = +25nc, unless otherwise noted.) ldos ldo output voltage change vs. load current MAX8939 toc15 load current (ma) output voltage change (mv) 600 500 400 300 200 100 -60 -50 -40 -30 -20 -10 0 -70 0 v batt = 3.7v default output voltage ldo1 current limit ldo3 ldo4 ldo2 ldo dropout voltage vs. load current MAX8939 toc16 load current (ma) dropout voltage (mv) 350 300 250 200 150 100 50 50 100 150 200 250 300 0 0 400 ldo1 v batt = 2.9v output set to 3.2v ldo3 ldo2 ldo4 ldo shutdown waveforms MAX8939 toc17 2v/div 2v/div 2v/div 2v/div 2v/div 1a/div v ldo3 v ldo2 v ldo1 v scl v ldo4 i batt 40s/div no load charge current vs. battery voltage MAX8939 toc18 battery voltage (v) charge current (ma) 5 4 1 2 3 10 20 30 40 50 60 70 80 90 100 0 0 v chg_in = 5v v set = 3.6v default charger settings maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
13 typical operating characteristics (continued) (v batt = 3.7v, circuit of figure 1, t a = +25nc, unless otherwise noted.) battery charger vibrator driver charge current vs. chg_in voltage MAX8939 toc19 chg_in voltage (v) charge current (ma) 12 3 6 9 50 100 150 200 250 300 350 400 450 500 0 01 5 v batt = 3.7v v set = 4.2v i fc = 450ma temp reg +100?c v chg_in falling v chg_in rising ovp uv debounce time from ovp detect to shutdown charging MAX8939 toc21 500mv/div 200v/div 50ma/div chg in i chg 10ms/div irq charger connect waveform MAX8939 toc20 2v/div 50ma/div 5v/div 2v/div v safe_out v chg_in v chg_mon i batt 4ms/div v batt = 3v 0.1f capacitor on chg_mon charger continues charging at high input ripple > 7hz and dc level < ovp threshold MAX8939 toc22 5.00v/div 2.00v/div 200ma/div 200ma/div v chg_in i chg_in v batt l batt 10ms/div vib disable waveform MAX8939 toc23 1v/div active brake 3v output, 50% duty cycle 50ma/div v outvib i outvib 40s/div maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
14 bump description bump configuration pin name function a1 pgnd2 power ground for wled boost converter. connect pgnd1, pgnd2, and agnd to the pcb ground plane. a2 lx2 inductor connection and switching node for wled boost converter a3 out2 wled step-up converter output. connect a 1ff capacitor from out2 to pgnd2. a4 out1 step-up converter output. connect a 2.2ff capacitor from out1 to ground. a5 lx1 inductor connection and switching node for out1 step-up converter a6 pgnd1 power ground for out1 step-up converter. connect pgnd1, pgnd2, and agnd to the pcb ground plane. b1 comp2 step-up compensation node for out2 step-up converter. connect a 0.22ff ceramic capacitor from comp to ground. the applied comp capacitance stabilizes the converter and sets the soft- start time. comp discharges to ground through a 20ki resistance when in shutdown. b2 led1 25ma led current regulator. connect led1 to the cathode of the first led string. b3 reset_in active-low reset input. pulse reset_in low to reset all registers (except status and event) to their default state. b4 scl clock input for i 2 c serial interface. high impedance when the i 2 c interface is off. b5 ldo1_en enable input for ldo1. drive ldo1_en high to enable ldo1, or low to disable ldo1. once ldo1 is enabled or disabled through i 2 c, the state of ldo1_en is ignored until reset. b6 comp1 compensation for out1 step-up converter. connect a 2200pf capacitor from comp1 to ground. see the soft-start out1 section for more details. top view (bumps on bottom) a b c d wlp 0.5mm pitch e lx2 2 led1 led2 outvib chg_mon out1 4 scl sda pwr_on_cmp batt pgnd2 a1 a2 a3 a4 a5 a6 b1 b2 b3 b4 b5 b6 c1 c2 c3 c4 c5 c6 d1 d2 d3 d4 d5 d6 e1 e2 e3 e4 e5 e6 1 comp2 led3 safe_out chg_in lx1 ldo1_en ldo3 ldo4 5 agnd pgnd1 comp1 ldo2 ldo1 6 ref out2 3 reset_in chg irq invib + maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
15 bump description (continued) pin name function c1 led3 indicator led connection. connect led3 to the cathode of the precharge indicator led. if a precharge indicator led is not used, leave led3 unconnected. c2 led2 25ma led current regulator. connect led2 to the cathode of the second led string. c3 chg charger disable input. connect chg high to disable the charger, or low to enable the charger. once the charger is enabled or disabled through i 2 c, the state of chg is ignored until reset. c4 sda data input for serial interface. high impedance when the i 2 c interface is off. c5 ldo3 200ma ldo output. connect a 2.2ff capacitor from ldo3 to ground. in shutdown, ldo3 is pulled to ground through an internal 100i. c6 ldo2 200ma ldo output. connect a 2.2ff capacitor from ldo2 to ground. in shutdown, ldo2 is pulled to ground through an internal 100i. d1 safe_out 4.9v regulated ldo output with input overvoltage protection. connect a 1ff ceramic capacitor from safe_out to ground. safe_out can be used to supply low-voltage-rated usb systems and the precharge indicator. d2 outvib vibrator driver output. connect outvib to the vibrator motor. connect a 1ff ceramic capacitor from outvib to ground. d3 irq interrupt request open-drain output d4 pwr_on _cmp open-drain output to wake sleeping baseband. pwr_on_cmp pulses low while the charger is connected. see the pwr_on_cmp section for details. d5 ldo4 100ma ldo output. connect a 1ff capacitor from ldo4 to ground. in shutdown, ldo4 is pulled to ground through an internal 100i. d6 ldo1 400ma ldo output. connect a 4.7ff capacitor from ldo1 to ground. in shutdown, ldo1 is pulled to ground through an internal 50i. e1 chg_in charger input supply voltage. chg_in is the power-supply input for the safe_out linear regulator and the battery charger. the operating range for the charger input is 4.1v to 10v (MAX8939) or 6.25v (MAX8939a/MAX8939b). chg_in is protected up to 28v. when v chg_in exceeds 10.6v (MAX8939) or 6.75 (MAX8939a/MAX8939b), safe_out and the charger are disabled. connect a 1ff or larger ceramic capacitor from chg_in to ground. e2 chg_mon charge current monitoring analog output. chg_mon outputs a voltage proportional to the charge current with 1.2v corresponding to the programmed fast-charge current. the chg_mon output includes ripple from loads on the battery. if this is not desired, connect a small 0.01ff to 0.1ff capacitor at the input of the adc to filter the ripple. e3 invib input supply for the vibrator driver. connect invib to batt. connect a 1ff ceramic capacitor from invib to pgnd. e4 batt battery connection and ic supply voltage. connect a 10ff ceramic capacitor from batt to ground. e5 agnd analog ground. connect pgnd1, pgnd2, and agnd to the pcb ground plane. e6 ref reference noise bypass. connect a 0.1ff ceramic capacitor from ref to agnd. do not load. ref is high impedance when shut down. maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
16 table 1. output summary *subject to valid voltage present at chg_in. supply output range default state at power-up default value (v) voltage tolerance (%) output current (ma) description ldo1 1.7v to 3.2v in 100mv step off 2.9 q3.0 400 low-noise ldo to supply power either to the rf or analog section. ldo1 is controlled from the i 2 c bus or the ldo1_en input. ldo2 1.7v to 3.2v in 100mv step off 1.8 q3.0 200 low-noise ldo to supply power either to the rf or analog section. ldo2 is controlled from the i 2 c bus. ldo3 1.7v to 3.2v in 100mv step off 2.8 q3.0 200 low-noise ldo to supply power either to the rf or analog section. ldo3 is controlled from the i 2 c bus. ldo4 1.7v to 3.2v in 100mv step off 2.8 q3.0 100 low-noise ldo to supply power either to the rf or analog section. ldo4 is controlled from the i 2 c bus. out1 (step-up) 3.5v to 5.0v in 100mv step off 5 q3.0 700 the out1 step-up converter provides a 5v power supply for an audio amplifier. the output voltage is programmable through i 2 c. out2 (led) v batt to 28v off n/a n/a 60 the out2 step-up converter operates at 2mhz and provides a high-voltage source for the keypad and backlight display drivers. outvib (vibrator) 1.3v, 2.5v, 3v, or invib bypass off 3 q3.0 200 high-power vibrator driver with programmable output voltage and speed control in 70 steps through i 2 c. the vibrator driver has active brake with stop. battery charger one-cell li+ MAX8939: 3.6v, 4.15v, 4.20v, or 4.25v MAX8939a/ MAX8939b: 3.50v, 3.85v, 4.05v, or 4.17v n/a* MAX8939: 3.6 MAX8939a/ MAX8939b: 3.5 q0.6 90 default MAX8939: 1.3a (max) MAX8939a/ MAX8939b: 850ma (max) a stand-alone constant-current, constant voltage (cc/cv), thermally regulated linear charger designed for charging a single-cell lithium-ion (li+) battery. the charger current and protection timer is programmable through i 2 c. safe_out 4.9v n/a* 4.9 q3.0 100 (max) protected output safe_out can be used to supply low-voltage-rated usb systems and the precharge indicator. the output voltage is a fixed 4.9v. maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
17 figure 1. typical application circuit and block diagram dc/usb input MAX8939: 4.10v to 10v MAX8939a/MAX8939b: 4.10v to 6.25v (protected up to 28v) 4.9v batt batt chg_in l2 10 h 1 f 0.22 f 10 f 10 f 4.7 f 2.2 f l1 2.2 h li+ battery safe_out led3 1 f 1 f ldo disable i/v to system batt 2.9v to 5.5v 3.5v to 5v, 700ma 1.7v to 3.2v, 400ma cc/cv reg li+ linear charger control pre_chg indication chg ldo1_en chg_mon ldo1 out1 on/off control uvlo and por and i 2 c interface lx2 out2 pgnd2 ramp timer blink rate and duty cycle led boost converter comp2 led1 led2 invib scl pwr_on_cmp sda irq reset_in batt control control control control control outvib 200ma 1.3v, 2.5v, 3.0v, or v batt 1 f 1 f 1 f m lx1 pgnd1 comp1 2200pf batt pwm boost convertor ldo1 2.2 f 1.7v to 3.2v, 200ma ldo2 batt control ldo2 2.2 f 1.7v to 3.2v, 200ma ldo3 batt control ldo3 1 f 0.1 f 1.7v to 3.2v, 100ma ldo4 ref agnd batt control ldo4 batt 1.2v reference MAX8939 MAX8939a MAX8939b pgnd pwm vib driver maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
18 figure 2. MAX8939/MAX8939a/MAX8939b state diagram active one or more supply is enabled st andby i 2 c active read default setting enable band-gap and internal osc 0.5ms uvlo upper over_temp uvlo upper threshold i2c read/write i2c ldo1_en uvlo upper threshold enable signal to control ldo1 reset v batt < v uvlo wake-up chg_det v batt safe_out charger asserted return to reset v batt < v uvlo reset_in = high or chg_det = 1 and chg = low pwr_on_cmp irq return to st andby all supplies disabled band-gap and internal osc disabled if charger not connected shutdown reset_in = low return to shutdown reset_in = low irq is asserted and event bit is set charger asserted pwr_on_cmp = high z when irq register is written maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
19 figure 3. battery charger state diagram precharge precharge current MAX8939 timeout: 30min MAX8939a/b timeout: 12min v batt > 2.55v v batt < 2.4v fast-charge MAX8939 default: 60min timeout MAX8939a/b default: 24min timeout and 90ma i fast-charge v set > 3.5v (MAX8939) or 3.6v (MAX8939a) top-off constant voltage mode (cv) default: 30min timeout or 10% of i fast-charge charging current is reduced as necessary any charging state die temperature default > +100c die temperature < + 100c done if top-off timeout charge current < top-off threshold and v batt = v set if v batt = v set v batt < 2.5v restart if v batt < restart threshold or chg_en charger detect chg = 0, v chg_in > 4.1v, v chg_in < 10v (MAX8939) or 6.25v (MAX8939a/b), and (v chg_in - v batt ) > 250mv charger disabled chg = 1, v chg_in < 4.1v, (v chg_in - v batt ) < 250mv, thermal shutdown, or ovp timeout charge done irq status top-off entering (cv) irq st at us fast-charge constant current (cc) return to charging state status top-off or fast_chg timer expire irq reset to default if uvlo = low or reset = low the charge timer is reset if reset = low by reasserted chg_in or chg_en. if reset = high, the timer is reset by enabling chg_en. timeout if any timer expires or watchdog times out, the charger is disabled ovp v chg_in > 10.6v (MAX8939) or 6.75v (MAX8939a/b) ovp enable the charger for 250ms ovp timer expires from any condition chg_in maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
20 detailed description startup and power states to guarantee the correct startup of the MAX8939/ MAX8939a/MAX8939b, an internal power-on reset is generated after the first connection of the battery. this resets the i 2 c registers to the default values. the ics are then in reset state. the reset state is a low power level, where the i 2 c interface is disabled and it is not possible to read or write to any register. the ics stay in reset state as long as v batt is below the uvlo upper threshold. when the battery voltage exceeds the uvlo upper threshold, the ics enter the standby state and the i 2 c bus can be written to. the typical response time of the uvlo detection is 50s. the uvlo upper threshold can be reached three ways: ? fully charge battery is inserted and reset is logic-high. ? reset changes from logic-low to logic-high and v batt > v uvlo_upper . ? charger is detected and chg is logic-low. standby standby is a low-power state where the i 2 c is ready for read/write operations and enables the different power units (table 1). if a unit is enabled through i 2 c or chg_in is powered, the bandgap and internal oscillator are started and the ics move to the active state. the ics stay in the active state until the last unit (including the charger) is disabled. reset the ics enter the reset state when the battery voltage drops below the uvlo lower threshold. in reset, all reg - isters are reset except the status and event registers that retain their values as long as the battery is con - nected. in reset, all power units are disabled and only the uvlo and chg_in detection circuitry is active. if a fully charged battery is inserted or a charger is detected, the ics enter standby. if a valid charger is connected, the state machine enables the pwr_on_cmp generator and an interrupt is sent to the host when above the uvlo upper threshold. when a valid charger is detected while in the reset state, the safe_out ldo is enabled and the charger begins precharging the battery. shutdown the shutdown state is an extremely low-power state. to enter shutdown, hold reset logic-low. in shutdown, all the internal blocks are disabled except the chg_in detection. if chg_in is asserted, the ics move to the reset state and starts charging with the default settings. when entering from shutdown, the charger is reset and the pwr_on_cmp generator is enabled. if the charger is removed, the ics move back to the shudown state if reset is still logic-low. charger the ics charger uses voltage, current, and thermal- control loops to charge a single li+ cell and to protect the battery. a complete charge cycle covers four states: prequalification (precharge), constant current fast- charge (cc), constant voltage top-off (cv), and charge complete (done). if the battery voltage is below 2.55v, the charger is pre-charging with 90ma until prequalifica - tion upper threshold is reach or the maximum precharge time (30min for the MAX8939 or 12min for the MAX8939a and MAX8939b) reached. the precharge timer is reset when chg_in is reasserted, and the charger starts charging if the battery voltage is below the precharge threshold. when the charger is in precharge mode, an led indicator (led3) and the safe_out ldo are turned on; all other functions are disabled. once the battery voltage has passed the prequalification upper threshold, the charger enters the fast-charge stage. an analog soft-start is used when entering fast charge to reduce inrush current on the input supply. when fast- charge is in progress, a safety timer is enabled and status can be read out of register 0x02 bit 4. for the MAX8939/ MAX8939a, the chg_en is cleared and starts charging if chg_in is asserted. the MAX8939b clears chg_en only if reset is logic-low. by pulling reset logic-high, the charger is disabled or enabled depending on the state of the chg_en bit. when chg_in is asserted, an interrupt occurs, and the host can control the state of the chg_in bit. the fast-charge current and safety timer are programmable through the i 2 c interface. the safety timers are reset if the charger is disabled and start a new cycle when the charger is enabled. the default battery regulation voltage (v set ) is 3.6v (MAX8939) or 3.5v (MAX8939a/MAX8939b), but can be programmed to 4.15v, 4.2v, or 4.25v for the MAX8939, or 3.85v, 4.05v, or 4.17v for the MAX8939a/MAX8939b. when the battery voltage reaches v set , the charger changes to top-off mode (cv). when entering top-off, an irq is flagged to indicate that the charger is in constant voltage mode. top-off mode keeps the voltage constant and the current falls slowly until the top-off current thresh - old is reached. an irq is flagged to indicate charge is maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
21 done. the top-off current threshold is a percentage of the fast-charge current, the threshold is programmable. when the top-off current threshold is set to 0% and restart is disabled, the top-off mode continues until the top-off timer expires. the top-off timer is programmable and can also be disabled. with the op-off threshold set to 0% and top-off timer disabled, the charger continu - ously charges the battery with a constant voltage and decreasing charge current. this makes it possible to control the charge algorithm through software, without influence of automatic maintaining charge. to qualify charge as done, the current has to be below top- off current threshold or a timeout has occurred. to main - tain the battery voltage, the charger can be programmed to restart once the battery voltage drops below a program - mable threshold. when restart is enabled and the battery voltage drops below the restart threshold, the charger starts a new charging cycle by entering fast-charge. if restart is disabled, the charger stops charging when done and does not maintain the battery voltage. when charge done occurs, an irq is sent to the host and a flag is set in register 0x03. reading the register disables the charger. the charger can be enabled by writing to register 0x09 bit 0 (chg_en). if one of the safety timers (fast-charge or top-off) expires, an interrupt is sent to the host and a flag is set in register 0x03. the charger is disabled 5s after the safety times out. if, at any point while charging the battery, the die tem - perature approaches the thermal regulation threshold (+100c default), the ics reduce the charging current so that the die temperature does not increase. this fea- ture not only protects the ics from overheating, but also allows the higher charge current without risking damage to the system. note all charger registers are reset to their default set - tings by power-on reset (por) or reset. charge on/off control chg is a logic hardware control input. logic-high disables the charger and logic-low enables the charger. 1. chg = logic-high, the charger is disabled when power pluck is asserted on chg_in and register 0x09 has not been affected. when chg changes logic state, a flag is set in the event register 0x03, and an interrupt occurs. 2. chg = logic-low, the charger is enabled and starts charging if charging conditions are within operating limits. once the chg_control_a register 0x09 is accessed either by reading or writing, the chg is ignored. when chg changes status after register 0x09 has been accessed, only status and event_a register is updated and an interrupt occurs. the chg_en bit in chg_control_a register 0x09 is always [1] by default. the chg_en does not follow the status of chg , and the charger is enabled just by reading the chg_control_a register 0x09 and chg is ignored. to avoid the charger enabling just by accessing the chg_control_a register 0x09, write [0] in the chg_en bit. for the MAX8939 and MAX8939a, if the chg_in is reconnected, the chg is reset and the status of the charger is following the logic level on chg , as long chg_control_a register 0x09 is not affected. for the MAX8939b, the chg is reset only by reasserting chg_in if reset or uvlo is low. safe_out safe_out is an ldo powered from the chg_in input. safe_out is enabled when a charger is detected (4.1v < v chg_in < 10v (MAX8939) or 6.25v (MAX8939a/ MAX8939b)) and provides a protected output regulated to 4.9v (5v max). typically, safe_out is used to power low- voltage usb systems and the precharge indicator. indicator led the led3 output sinks 3ma (typ) to drive an indica - tor led. led3 is on by default and can be controlled by the host by i 2 c (bit 7 of the reg_control register). typically, this led indicates charge status and safe_out powers the led as shown in figure 1. charge current monitor (chg_mon) chg_mon is an analog output used to monitor the charge current. chg_mon outputs a voltage propor- tional to the charge current with 1.2v corresponding to the programmed fast-charge current. the chg_mon output includes ripple from loads on the battery. if this is not desired, connect a small 0.01 ff to 0.1ff capacitor at the input of the adc to filter the ripple. charger watchdog timer during battery fast-charge, a watchdog monitoring func - tion can be activated to ensure that the host processor has control of the charge algorithm. the watchdog timer is enabled through register reg_control bit wd_en. when the charger is enabled by chg_en or chg_in, the watchdog timer starts counting. within 5s of enabling the charger, the host must read or write register 0x09 or 0x0a to indicate it is alive. this resets the watchdog maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
22 timer and the host must continue to read or write register 0x09 or 0x0a in intervals of under 5s. if the host takes more than 5s for reading or writing these registers, the watchdog timer expires, generates an interrupt, flags the watchdog timeout in register 0x03, and disables the charger (figure 4). charge in overvoltage protection to detect that a valid charger is asserted at chg_in, an upper and lower threshold is defined. this threshold is different for the MAX8939, MAX8939a, and MAX8939b. see the electrical characteristics table for upper/lower threshold. if an overvoltage condition occurs on chg_in, a de- bounce timer is enabled and powers the charger down after a max delay of 324ms. when the charger is pow - ered down, an interrupt occurs and a flag is set in event register a. this ovp timer enables the possibility of using a low cost wall-plug adapter with poor voltage regulation. the charger continue charging and no interrupt occurs as long the ovp is not violating the max 324ms. fast thermal regulation ensures that the temperature does not exceed the programmed value (default is programmed at +100nc at high voltage < 30v and maxi - mum charge current). if the junction temperature rises until the programmed value, the charge current is not switched off, but regulated down to a level to maintain the temperature around the programmed threshold. interrupt request (irq) irq is an active-low, open-drain output signal (requires an external pullup resistor) that indicates that an interrupt event has occurred and that the event and status infor - mation are available in the event/status registers. such information includes temperature and voltages inside the ics fault conditions, etc. the event registers hold information about events that have occurred in the ics. events are triggered by a status change in the monitored signals. when an event bit is set in the event register, the irq signal is asserted (unless irq is masked by a bit in the irq mask register). the irq is also masked during power-up and is not released until the event registers have been read. each event register is reset to its initial condition after being read. the irq is not released until all the event registers have been read. new events that occur during read-out of the event registers are held until all the event registers have been read to, ensuring that the host processor does not miss them. pwr_on_cmp is an open-drain output used to wake-up a sleeping baseband. pwr_on_cmp is activated when a charger is detected (v chg_in is between 4.1v and 10v (MAX8939) or 6.25v (MAX8939a/MAX8939b)) and the battery voltage is above the uvlo threshold. if the battery has already reached the uvlo upper threshold, the charger is detected by a rising edge. when such an figure 5. pwr_on_cmp sequence figure 4. watchdog timing diagram 1ms 50ms uvlo upper threshold uvlo and charger detection event all event registers are read. pwr_on_cmp and irq are cleared charger removal event all event registers are read. irq is cleared. v chg_in v batt irq pwr_on_cmp the watchdog timer expires charger disabled watchdog_en chg_en/det wathcdog timer reset timer irq host read or write charge registers t < 5s t = 5s maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
23 figure 6. ramp-up/ramp-down event is detected, the ics start pulsing the pwr_on_ cmp output every 50ms, with a duty cycle of 98%. see figure 5. the event is also signaled by irq, which is asserted when the uvlo upper threshold is reached and the chg_det bit is set in register 0x04 (bit 6). the ics con - tinue pulsing pwr_on_cmp until the event registers 0x04 or 0x03 are read/written to or the charger safety timer expires. by reading/writing to the event register, the register is cleared and pwr_on_cmp and irq returns to high impedance. the events causing the pwr_on_cmp activation are triggered by a rising edge signal that must remain valid for the duration of a 10ms debounce filter. reset_in reset_in is an active-low input signal to the ics and is used to provide a full system reset inside the ics. as long as reset_in is logic-low, the ics are not able to do any- thing (except the charger), until reset_in is released. all registers are cleared except the status and event registers. when reset_in is asserted, the event_b bit reset is set. if the chg_in voltage is valid and reset_ in is logic-low, the charger operates in its default state. linear regulators the ics include four low-dropout linear regulators (ldos). all ldos are designed for low dropout, low noise, high psrr, and low quiescent current to maximize battery life. when the battery voltage is above the uvlo upper threshold, the ics ldos are ready to be turned on through the i 2 c interface. the guaranteed current drive capabilities for the ldos are 400ma for ldo1, 200ma for ldo2 and ldo3, and 100ma for ldo4. the output voltage for each ldo is programmable through the i 2 c interface from 1.7v to 3.2v in 0.1v steps. ldo1 can be enabled through a hardware pin ldo1_en. by connecting this pin to a logic-high level, the ldo enables automatically when the uvlo upper threshold is reached. the ldo can also be controlled by the ldo1_en bit of the reg_control. when the ldo1_en bit is written to, the ldo1 enable state reflects the value written, overriding the state of the ldo1_en pin. when the state of the ldo1_en pin changes, the ldo1 enable state is determined by the new state of the ldo1_en pin, overriding the ldo1_en bit value. this allows the system software to reduce quiescent power consumption by turning off ldo1 without impacting other logic that may utilize the same hardware control used for the ldo1_en pin. out1 step-up dc-dc converter out1 is a fixed-frequency pwm step-up converter. the converter switches an internal power mosfet and synchronous rectifier at a constant 2mhz frequency with varying duty cycle up to 75% to maintain constant out - put voltage as the input voltage and load current vary. internal circuitry prevents any unwanted subharmonic switching in the critical step-down/step-up region by forcing a minimum 8% duty cycle. out1 delivers up to 700ma to the load at a voltage pro - grammable through i 2 c from 3.5v to 5v in 100mv steps. soft-start out1 out1 soft-starts by charging c comp1 with a 100fa current source. during this time, the internal mosfet is switching at the minimum duty cycle. once v comp1 rises above 1v, the duty cycle increases until the output voltage reaches the desired regulation level. comp1 is pulled to ground with a 30 i internal resistor during uvlo or shutdown. out2 white led driver out2 is the output from the step-up dc-dc converter for driving white leds. the converter is able to drive up to 60ma at up to 28v. the step-up converter is adaptive connected to the two low-dropout led current regula - tors. the step-up converter operates at a fixed 2mhz switching frequency, enabling the use of very small external components to achieve a compact circuit area. for improved efficiency, the step-up converter automati - cally operates in pulse-skipping mode at light loads. i led_ = full scale i led_ = ? scale 0ma i led_ = full scale i led_ = ? scale 0ma 256ms 512ms 1024ms 2048ms 256ms 512ms 1024ms 2048ms maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
24 soft-start out2 from shutdown, once led1 or led2 is enabled through the i 2 c interface, the step-up converter prepares for soft-start. c comp2 is quickly pulled to 1v by an internal pullup clamp. since the led_ feedback node voltage is less than the regulation threshold (0.35v typ), 40 fa current is sourced from the error amplifier and further charges c comp2 . once v comp2 reaches 1.25v, the step-up converter starts switching at a reduced duty cycle. as v comp2 rises, the step-up converter duty cycle increases. when v led1 or v led2 reaches 0.35v (typ), the error amplifier stops sourcing current to c comp2 , soft-start ends, and the control loop achieves regulation as v led_ settles. the v comp2 where the step-up converter exits soft-start depends on the load. a 2.5v upper limit to v comp2 is imposed to aid in transient recovery and to allow maximum output for low input voltages. c comp2 is discharged to ground through a 20ki internal resistor whenever the step-up converter is turned off, allowing the device to reinitiate soft-start when it is enabled. led1 and led2 current regulators each current regulator drives a series string of leds. the maximum number of leds depends of maximum forward voltage of the leds at the maximum desired current. the total forward voltage of the led string must be below 27.65v. the led current is independently programmed using the i 2 c interface from 50 fa to 25.25ma with a 128- step logarithmic dimming scheme. ramp-up/-down the ics led current regulators provide ramp- up and ramp-down functionality for smooth transitions between different brightness settings. a controlled ramp is used when the led current level is changed, and when the leds are enabled or disabled. led1 and led2 have individual ramp control, making it possible to ramp different groups at different rates. the ramp-up and ramp-down times are controlled by the led__ru and led__rd control bits, and the ramps are enabled/dis - abled by the led__ramp_en bits. the ics increase or decrease the current one step every t ramp /32 until the target led current is reached. open/short detection the ics include comparators to detect open or shorted leds on led1 and led2. one comparator on each led_ output detects when the voltage falls below 100mv, indi - cating an open led fault. another comparator on each led_ output detects when the voltage rises above v out2 - 1v, indicating a shorted led fault. the fault-detection comparators are enabled only when the corresponding led_ current regulator is enabled and provides a con - tinuous monitor of the current regulator conditions. once a fault is detected, it is flagged in the event_b register and the irq signal is asserted (unless masked in the irq_mask_b register). overvoltage protection if the voltage on the out2 rises above 28v (typ), the led driver is put into the shutdown state. this protects the ics from excessive voltage in the event of an open- circuit led. vibrator driver the vibrator driver is an ldo with pwm control (see figure 8). the ldo output voltage is programmable through i 2 c to 1.3v, 2.5v, 3.0v, and v batt . the vibrator driver is driven with a pwm signal of duty cycle from 0% to 83% or 100%, with a repetition fre - quency of 23.8khz divided into 84 steps. a pwm ratio set to greater than 83 results in the vibrator output being permanently enabled (100%). figure 9 shows the output waveform at different output voltage and pwm settings. the duty cycle is set by the i 2 c interface, with a value greater than 0 enabling the pwm mode of operation. by using the enable/disable, an active stop is activated. figure 8. vibrator driver figure 7. timing of ovp detection i 2 c outvib m batt invib pwm vib driver charger detected uvlo comparator delay charger process ovp interrupt debounce 250ms 40% maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
25 figure 9. vibrator driver pwm output figure 10. i 2 c master/slave configuration when the vibrator is disabled, an nfet switch turns on and shorts the vibrator to ground. at the same time the nfet switch works as a recovery diode to protect against reverse voltage from the vibrator. the ics include current protection that limits the current in case the vibrator motor locks up. thermal shutdown the ics monitor the die temperature at the charger and each ldo and dc-dc regulator. when the temperature exceeds +160 n c, the individual regulator is shutdown is shutdown. once the die cools by 20 nc, the regulator may be reenabled through the i 2 c interface. the charger has independent thermal control circuitry that lowers the charge current to regulate the die tem - perature during the charge. the charger cannot exceed a temperature higher than the programmed level (default +100n c, +115n c max). i 2 c serial interface the serial bus consists of a bidirectional serial-data line (sda) and a serial-clock input (scl). see figure 10. the ics are slave-only devices, relying upon a master to generate the clock signal. the master initiates data transfer on the bus and generates scl to permit data transfer. the i 2 c slave address is 0x62 for write opera - tions and 0x63 for read operations. i 2 c is an open-drain bus. sda and scl require pullup resistors (500i or greater). optional (24 i) resistors in series with sda and scl protect the ic inputs from high-voltage spikes on the bus lines. series resistors also minimize crosstalk and undershoot on bus signals. data transfer one data bit is transferred during each scl clock cycle. the data on sda must remain stable during the high peri - od of the scl clock pulse (see figure 11). changes in sda while scl is high are control signals (see the start and stop conditions section for more information). each transmit sequence is framed by a start (s) con - dition and a stop (p) condition. each data packet is 9 bits long; 8 bits of data followed by the acknowledge bit. the ics support data transfer rates with scl frequencies up to 400khz. start and stop conditions when the serial interface is inactive, sda and scl idle high. a master device initiates communication by issuing a start condition. a start condition is a high-to-low tran- figure 11. i 2 c bit transfer figure 12. i 2 c start and stop conditions v batt 3.0v 2.5v 1.3v v pwm master transmitter/ receiver slave receiver sda scl slave transmitter/ receiver sda scl data line stable data valid change of data allowed sda scl start condition stop condition maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
26 smbus is a trademark of intel corp. sition on sda with scl high. a stop condition is a low-to- high transition on sda, while scl is high (figure 12). a start condition from the master signals the begin - ning of a transmission to the ics. the master terminates transmission by issuing a not acknowledge followed by a stop condition (see the acknowledge section for more information). the stop condition frees the bus. to issue a series of commands to the slave, the master may issue repeated start (sr) commands instead of a stop command to maintain control of the bus. in general, a repeated start command is functionally equivalent to a regular start command. when a stop condition or incorrect address is detected, the ics internally disconnect scl from the serial inter - face until the next start condition, minimizing digital noise and feedthrough. acknowledge both the master and the ics (slave) generate acknowl - edge bits when receiving data. the acknowledge bit is the last bit of each 9-bit data packet. to generate an acknowledge (a), the receiving device must pull sda low before the rising edge of the acknowledge-related clock pulse (ninth pulse) and keep it low during the high period of the clock pulse (figure 13). to generate a not acknowledge (na), the receiving device allows sda to be pulled high before the rising edge of the acknowl - edge-related clock pulse and leaves it high during the high period of the clock pulse. monitoring the acknowledge bits allows for detection of unsuccessful data transfers. an unsuccessful data transfer occurs if a receiving device is busy or if a system fault has occurred. in the event of an unsuccessful data transfer, the bus master should reattempt communica - tion at a later time. slave address a bus master initiates communication with a slave device (ics) by issuing a start condition followed by the slave address. the slave address byte consists of 7 address bits (0110001) and a read/write bit (r/ w ). after receiving the proper address, the ics issue an acknowledge by pulling sda low during the ninth clock cycle. figure 14. writing to the MAX8939/MAX8939a/MAX8939b figure 13. i 2 c acknowledge legend slave to master master to slave a. writing to a single register with the "write byte" protocol 17 11 88 11 1 s0 aa ap slave address register pointer data number of bits r/w r/w b. writing to multiple registers 17 11 88 11 1 8 s0 aa aa slave address register pointer x data x number of bits data x+1 88 11 aa p data x+n-1 data x+n number of bits sda output from transmitter sda output from receiver scl from master 1 not acknowledge acknowledge clock pulse for acknowledgement d7 start condition d6 d0 28 9 maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
27 write operations the ics recognize the write byte protocol as defined in the smbus k specification and shown in section a of figure 14. the write byte protocol allows the i 2 c master device to send 1 byte of data to the slave device. the write byte protocol requires a register pointer address for the subsequent write. the ics acknowledge any register pointer even though only a subset of those registers actually exists in the device. the write byte protocol is as follows: 1) the master sends a start command. 2) the master sends the 7-bit slave address followed by a write bit (0x62). 3) the addressed slave asserts an acknowledge by pull - ing sda low. 4) the master sends an 8-bit register pointer. 5) the slave acknowledges the register pointer. 6) the master sends a data byte. 7) the slave updates with the new data. 8) the slave acknowledges the data byte. 9) the master sends a stop condition. in addition to the write-byte protocol, the ics can write to multiple registers as shown in section b of figure 14. this protocol allows the i 2 c master device to address the slave only once and then send data to a sequential block of registers starting at the specified register pointer. use the following procedure to write to a sequential block of registers: 1) the master sends a start command. 2) the master sends the 7-bit slave address followed by a write bit (0x62). 3) the addressed slave asserts an acknowledge by pulling sda low. 4) the master sends the 8-bit register pointer of the first register to write. 5) the slave acknowledges the register pointer. 6) the master sends a data byte. 7) the slave updates with the new data. 8) the slave acknowledges the data byte. 9) steps 6 to 8 are repeated for as many registers in the block, with the register pointer automatically incre - mented each time. 10) the master sends a stop condition. read operations the method for reading a single register (byte) is shown in section a of figure 15. to read a single register: 1) the master sends a start command. 2) the master sends the 7-bit slave address followed by a write bit (0x62). 3) the addressed slave asserts an acknowledge by pulling sda low. 4) the master sends an 8-bit register pointer. 5) the slave acknowledges the register pointer. 6) the master sends a repeated start condition. 7) the master sends the 7-bit slave address followed by a read bit (0x063). figure 15. reading from the MAX8939/MAX8939a/MAX8939b legend slave to master master to slave a. reading a single register 17 11 88 7 11 11 s0 aa sr 1a slave address register pointer slave address number of bits r/w r/w na p data b. reading multiple registers 17 11 88 7 11 11 s0 aa sr 1a slave address register pointer x slave address number of bits number of bits r/w r/w a data x 8 a data x+1 8 a data x+n-1 8 na p data x+n maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
28 figure 16. i 2 c timing diagram 8) the slave asserts an acknowledge by pulling sda low. 9) the slave sends the 8-bit data (contents of the register). 10) the master asserts a not acknowledge by keeping sda high. 11) the master sends a stop condition. in addition, the ics can read a block of multiple sequen - tial registers as shown in section b of figure 15. use the following procedure to read a sequential block of registers: 1) the master sends a start command. 2) the master sends the 7-bit slave address followed by a write bit (0x62). 3) the addressed slave asserts an acknowledge by pulling sda low. 4) the master sends an 8-bit register pointer of the first register in the block. 5) the slave acknowledges the register pointer. 6) the master sends a repeated start condition. 7) the master sends the 7-bit slave address followed by a read bit (0x063). 8) the slave asserts an acknowledge by pulling sda low. 9) the slave sends the 8-bit data (contents of the register). 10) the master asserts an acknowledge by pulling sda low when there is more data to read, or a not acknowledge by keeping sda high when all data has been read. 11) steps 9 and 10 are repeated for as many registers in the block, with the register pointer automatically incremented each time. 12) the master sends a stop condition. table 2. register access types sda scl start condition repeated start condition start condition stop condition t hd,sta t hd,dat t su,dat t su,sta t su,sto t buf t hd,sta t low t high t r t f symbol register type notes r read only a field which is either static or is updated only by hardware. value written by software is ignored by hardware; that is, software may write any value to this field without affecting hardware behavior. w write only r/w read/write hardware updates of this field are visible by software read and software updates of this field are visible by a hardware read. rh read only; hardware affected r&c read and clear nasr not affected by software reset maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
29 table 3. operating mode register access type register pointer power-on default msb bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 lsb bit 0 chip_id1 r 0x00 0x56 die type information chip_id2 r 0x01 0x04 (MAX8939) 0x06 (MAX8939a) 0x09 (MAX8939b) die type and mask revision information status r 0x02 0x00 reserved chg_det top_off fast_ chg ldo1_ hwen temp_ reg done chg event_a r&c 0x03 0x00 temp_ reg chg_ovp_ in restart done top_off wdog_ timeout time_ out chg event_b r&c 0x04 0x00 chg_rem chg_det uvlo reset overtemp led2_ fault led1_ fault ldo1_ hwen irq_mask_a w 0x03 0xff temp_ reg chg_ ovp_in restart done top_off wdog_ timeout time_ out chg irq_mask_b w 0x04 0xef chg_rem chg_det uvlo reset overtemp led2_ fault led1_ fault ldo1_ hwen reg_control r/w 0x05 0x80 led3_en wd_en boost2_ en boost1_ en ldo4_en ldo3_en ldo2_en ldo1_en ldo1/ldo2 r/w 0x06 0x1c ldo2 ldo1 ldo3/ldo4 r/w 0x07 0xbb ldo4 ldo3 boost1 r/w 0x08 0x0f reserved boost1 chg_control_a r/w 0x09 0x1f fast_charge restart top_off chg_en chg_control_b r/w 0x0a 0x20 topoff_time temp_reg cctr vset led_ramp_1 r/w 0x0b 0x80 vib_voltage led1_rd led1_ru led_ramp_2 r/w 0x0c 0x00 led2_ ramp_en led1_ ramp_en led2_rd led2_ru led1 r/w 0x0d 0x00 en iled1 led2 r/w 0x0e 0x00 en iled2 vib r/w 0x0f 0x00 en speed maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
30 table 4. chip_id1 table 5. chip_id2 table 6. status register name chip_id1 register pointer 0x00 reset value 0x56 type r bit type name description default 0C7 r die type bcd characters 69 0x56 register name chip_id2 register pointer 0x01 reset value 0x04 (MAX8939), 0x06 (MAX8939a), 0x09 (MAX8939b) type r bit type name description default 0C7 r mask revision bcd characters 01 0x04 (MAX8939), 0x06 (MAX8939a) 0x09 (MAX8939b) register name status register pointer 0x02 reset value 0x00 type r bit type name description default 0 r chg charger disabled 0 1 r done fast-charging complete 0 2 r temp_reg charger in thermal regulation 0 3 r ldo1_hwen enable pin status 0 4 r fast_chg fast charging in progress (cc) 0 5 r top_off top off in progress (cv) 0 6 r chg_det pwr_on_cmp asserted by charger detection 0 7 r reserved 0 maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
31 table 7. event_a table 8. event_b note: the event registers hold information about events that have occurred in MAX8939/MAX8939a/MAX8939b. events are trig - gered by a change in the status registers, which contains the status of the monitored signals. when an event bit is set in the event register the irq signal shall be asserted (unless the irq is to be masked by a bit in the irq mask register). the irq is also masked during the power-up sequence and are not released until the event registers have been read for the first time. the event registers are automatically cleared during read-out operation automatically. the event registers may be read-out in page mode. new events that occur during read-out are delayed before they are passed to the event register, ensuring that the host controller does not miss them. register name event_a register pointer 0x03 reset value 0x00 type r/r&c bit type name description default 0 r&c chg charger disabled caused irq 0 1 r&c time_out fast_chg or top_off timeout caused irq 0 2 r&c wdog_timeout watchdog timeout caused irq 0 3 r&c top_off entering top_off (cv) caused irq 0 4 r&c done fast-charging complete caused irq 0 5 r&c restart fast-charging restarted caused irq 0 6 r&c chg_ovp_in charger input overvoltage caused irq 0 7 r&c temp_reg charger in thermal regulation caused irq 0 register name event_b register pointer 0x04 reset value 0x00 type r/r&c bit type name description default 0 r&c ldo1_hwen enable pin shift status caused irq 0 1 r&c led1_fault shorted or open circuitry caused irq 0 2 r&c led2_fault shorted or open circuitry caused irq 0 3 r&c overtemp overtemperature caused irq 0 4 r&c reset reset asserted 0 5 r&c uvlo undervoltage lockout caused irq 0 6 r&c chg_det charge detect = 1 if a valid charger is detected by a rising edge on chg_in 0 7 r&c chg_rem charger removal caused irq 0 maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
32 table 9. irq_mask_a table 10. irq_mask_b register name irq_mask_a register pointer 0x03 reset value 0xff type w bit type name description default 0 w chg charger disabled 1 1 w time_out fast_chg or top_off timeout caused irq 1 2 w wdog_timeout watchdog timeout caused irq 1 3 w top_off entering top_off (cv) caused irq 1 4 w done fast-charging complete caused irq 1 5 w restart fast-charging restarted caused irq 1 6 w chg_ovp_in charger input overvoltage caused irq 1 7 w temp_reg charger in thermal regulation caused irq 1 register name irq_mask_b register pointer 0x04 reset value 0xef type w bit type name description default 0 w ldo1_hwen enable pin shift status caused irq 1 1 w led1_fault shorted or open circuitry caused irq 1 2 w led2_fault shorted or open circuitry caused irq 1 3 w overtemp overtemperature caused irq 1 4 w reset reset asserted 0 5 w uvlo undervoltage lockout caused irq 1 6 w chg_det pwr_on_cmp asserted by charger detection and caused irq when uvlo upper 1 7 w chg_rem charger removal caused irq 1 maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
33 table 11. reg_control table 12. ldo1, ldo2 register name reg_control register pointer 0x05 reset value 0x80 type r/w bit type name description default 0 r/w ldo1_en disable ldo1 enable ldo1 0 1 0 1 r/w ldo2_en disable ldo2 enable ldo2 0 1 0 2 r/w ldo3_en disable ldo3 enable ldo3 0 1 0 3 r/w ldo4_en disable ldo4 enable ldo4 0 1 0 4 r/w boost1_en disable boost1 enable boost1 0 1 0 5 r/w boost2_en disable boost2 (auto on) enable boost2 0 1 0 6 r/w wd_en disable watchdog charger enable watchdog charger 0 1 0 7 r/w led3_en led3 disabled led3 enabled 0 1 1 register name ldo1, ldo2 register pointer 0x06 reset value 0x1c type r/w bit type name description default 0 r/w ldo1 set ldo1 output voltage. 1100 (2.9v) 1 0000 1.7v 0001 1.8 0010 1.9 0011 2.0 0100 2.1 0101 2.2 0110 2.3 0111 2.4 1000 2.5 1001 2.6 1010 2.7 1011 2.8 1100 2.9 1101 3.0 1110 3.1 1111 3.2 2 3 maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
34 table 12. ldo1, ldo2 (continued) table 13. ldo3, ldo4 bit type name description default 4 r/w ldo2 sets ldo2 output voltage. 0001 (1.8v) 5 0000 1.7v 0001 1.8 0010 1.9 0011 2.0 0100 2.1 0101 2.2 0110 2.3 0111 2.4 1000 2.5 1001 2.6 1010 2.7 1011 2.8 1100 2.9 1101 3.0 1110 3.1 1111 3.2 6 7 register name ldo3, ldo4 register pointer 0x07 reset value 0xbb type r/w bit type name description default 0 r/w ldo3 set ldo3 output voltage. 1101 (2.8v) 1 0000 1.7v 0001 1.8 0010 1.9 0011 2.0 0100 2.1 0101 2.2 0110 2.3 0111 2.4 1000 2.5 1001 2.6 1010 2.7 1011 2.8 1100 2.9 1101 3.0 1110 3.1 1111 3.2 2 3 4 r/w ldo4 sets ldo4 output voltage. 1011 (2.8v) 5 0000 1.7v 0001 1.8 0010 1.9 0011 2.0 0100 2.1 0101 2.2 0110 2.3 0111 2.4 1000 2.5 1001 2.6 1010 2.7 1011 2.8 1100 2.9 1101 3.0 1110 3.1 1111 3.2 6 7 maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
35 table 14. boost1 table 15. chg_control_a register name boost1 register pointer 0x08 reset value 0x0f type r/w bit type name description default 0 r/w boost1 set out1 voltage. 1111 (5.0v) 1 0000 3.5v 0001 3.6 0010 3.7 0011 3.8 0100 3.9 0101 4.0 0110 4.1 0111 4.2 1000 4.3v 1001 4.4 1010 4.5 1011 4.6 1100 4.7 1101 4.8 1110 4.9 1111 5.0 2 3 4 reserved 5 6 7 register name chg_control_a register pointer 0x09 reset value 0x1f type r/w bit type name description default 0 r/w chg_en disable charger enable charger 0 1 1 1 r/w top_off top-off current threshold 10% 20% 30% 0% 00 01 10 11 11 2 maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
36 table 15. chg_control_a (continued) table 16. chg_control_b note: accessing this register resets the watchdog timer. fast-charge current values are maximum value. real current may be lower by 10%. note: accessing this register resets the watchdog timer. bit type name description default 3 r/w restart restart threshold 200mv 300mv 400mv disable 00 01 10 11 11 4 5 r/w fast_charge fast-charge current MAX8939/ MAX8939a/ MAX8939b 90ma 270ma 450ma 630ma 765ma 850ma 000 001 010 011 100 101 000 6 7 MAX8939 1020ma 1275ma 110 111 MAX8939a/ MAX8939b 120ma 180ma 110 111 register name chg_control_b register pointer 0x0a reset value 0x20 type r/w bit type name description default 0 r/w vset charge voltage MAX8939 3.60v 4.15v 4.20v 4.25v 00 01 10 11 00 1 MAX8939a/ MAX8939b 3.50v 3.85v 4.05v 4.17v 00 01 10 11 2 r/w cctr fast-charge timer for maximum operation time MAX8939/ MAX8939a/ MAX8939b 60min 24min 00 00 00 3 MAX8939/ MAX8939a/ MAX8939b 120min 240min disabled 01 10 11 4 r/w temp_reg thermal regulation +70nc +85nc +100nc +115nc 00 01 10 11 10 5 6 r/w topoff_time top-off timer for constrained operation 30min 60min 120min disabled 00 01 10 11 00 7 maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
37 table 17. led_ramp_1 register name led_ramp_1 register pointer 0x0b reset value 0x80 type r/w bit type name description default 0 r/w led1_ru full-scale ramp time 0s 0.128s 0.256s 0.512s 0.760s 1.000s 2.000s 4.000s 000 001 010 011 100 101 110 111 000 1 2 3 r/w led1_rd full-scale ramp time 0s 0.128s 0.256s 0.512s 0.760s 1.000s 2.000s 4.000s 000 001 010 011 100 101 110 111 000 4 5 6 r/w vib_voltage maximum output voltage from vib driver 1.3v 2.5v 3.0v bypass 00 01 10 11 10 7 maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
38 table 18. led_ramp_2 table 19. led1 register name led_ramp_2 register pointer 0x0c reset value 0x00 type r/w bit type name description default 0 r/w led2_ru full-scale ramp time 0s 0.128s 0.256s 0.512s 0.760s 1.000s 2.000s 4.000s 000 001 010 011 100 101 110 111 000 1 2 3 r/w led2_rd full-scale ramp time 0s 0.128s 0.256s 0.512s 0.760s 1.000s 2.000s 4.000s 000 001 010 011 100 101 110 111 000 4 5 6 r/w led1_ramp_en disable led1 ramp enable led1 ramp 0 1 0 7 r/w led2_ramp_en disable led2 ramp enable led2 ramp 0 1 0 register name led1 register pointer 0x0d reset value 0x00 type r/w maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
39 bit type name description default 0 r/w iled1 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0.05ma 0.10 0.20 0.25 0.35 0.45 0.55 0.65 0.75 0.85 1.00 1.10 1.20 1.35 1.45 1.60 1.75 1.85 2.00 2.15 2.30 2.45 2.60 2.75 2.9 3.05 3.2 3.35 3.5 3.65 3.85 4 4.15 4.35 4.55 4.7 4.9 5.05 5.25 5.45 5.6 5.8 5.95 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 6.15ma 6.35 6.50 6.70 6.90 7.10 7.30 7.45 7.65 7.85 8.05 8.25 8.45 8.65 8.85 9.05 9.25 9.45 9.65 9.90 10.1 10.3 10.5 10.7 10.9 11.15 11.35 11.55 11.8 12.00 12.20 12.45 12.65 12.85 13.10 13.30 13.55 13.75 14.00 14.20 14.45 14.65 14.90 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 15.15ma 15.35 15.60 15.80 16.05 16.30 16.50 16.75 17.00 17.25 17.45 17.70 17.95 18.20 18.45 18.65 18.90 19.15 19.40 19.65 19.90 20.15 20.40 20.65 20.90 21.15 21.40 21.65 21.90 22.15 22.40 22.65 22.90 23.15 23.40 23.70 23.95 24.20 24.45 24.70 25.00 25.25 0000000 1 2 3 4 5 6 7 r/w en disable led1 enable led1 0 1 0 table 19. led1 (continued) maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
40 table 20. led2 register name led2 register pointer 0x0e reset value 0x00 type r/w bit type name description default 0 r/w iled2 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0.05ma 0.10 0.20 0.25 0.35 0.45 0.55 0.65 0.75 0.85 1.00 1.10 1.20 1.35 1.45 1.60 1.75 1.85 2.00 2.15 2.30 2.45 2.60 2.75 2.90 3.05 3.20 3.35 3.50 3.65 3.85 4.00 4.15 4.35 4.55 4.70 4.90 5.05 5.25 5.45 5.60 5.80 5.95 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 6.15ma 6.35 6.50 6.70 6.90 7.10 7.30 7.45 7.65 7.85 8.05 8.25 8.45 8.65 8.85 9.05 9.25 9.45 9.65 9.90 10.10 10.30 10.50 10.70 10.90 11.15 11.35 11.55 11.80 12.00 12.20 12.45 12.65 12.85 13.10 13.30 13.55 13.75 14.00 14.20 14.45 14.65 14.90 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 15.15ma 15.35 15.60 15.80 16.05 16.30 16.50 16.75 17.00 17.25 17.45 17.70 17.95 18.20 18.45 18.65 18.90 19.15 19.40 19.65 19.90 20.15 20.40 20.65 20.90 21.15 21.40 21.65 21.90 22.15 22.40 22.65 22.90 23.15 23.40 23.70 23.95 24.20 24.45 24.70 25.00 25.25 0000000 1 2 3 4 5 6 7 r/w en disable led2 enable led2 0 1 0 maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
41 table 21. vib register name vib register pointer 0x0f reset value 0x00 type r/w bit type name description default 0 r/w speed 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0.00% 1.19 2.38 3.57 4.76 5.95 7.14 8.33 9.52 10.7 11.9 13.0 14.2 15.4 16.6 17.8 19.0 20.2 21.4 22.6 23.8 25.0 26.1 27.3 28.5 29.7 30.9 32.1 33.3 34.5 35.7 36.9 38.0 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 39.2% 40.4 41.6 42.8 44 45.2 46.4 47.6 48.8 50.0 51.1 52.3 53.5 54.7 55.9 57.1 58.3 59.5 60.7 61.9 63.0 64.2 65.4 66.6 67.8 69.0 70.2 71.4 72.6 73.8 75.0 76.1 77.3 0x42 0x43 0x44 0x45 0x46 ... 0xff 78.5% 79.7 80.9 82.1 100 100 0000000 1 2 3 4 5 6 7 r/w en disable vib enable vib 0 1 0 maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
42 table 22. recommended inductors for l1 applications information inductor selection the out1 step-up converter is designed to use a 2.2 fh to 10fh inductor (see table 22). to prevent core satura - tion, ensure that the inductor saturation current rating exceeds the peak inductor current for the application. calculate the worst-case peak inductor current with the following formula: out out(max) in(min) peak in(min) v i v 0.5 s i 0.9 v 2 l = + f the out2 led driver is optimized for using a 10 fh inductor, although larger or smaller inductors may be used. using a smaller inductance results in discontinu - ous current mode operation over a larger range of output power, whereas use of a larger inductance results in continuous conduction for most of the operating range. to prevent core saturation, ensure that the inductors saturation current rating exceeds the peak inductor cur - rent for the application. for larger inductor values and continuous conduction operation, calculate the worst- case peak inductor current with the following formula: out out(max) in(min) peak in(min) v i v 0.5 s i 0.9 v 2 l = + f for small values of l in discontinuous conduction opera - tion, i peak is 860ma (typ). table 23 provides a list of recommended inductors. capacitor selection ceramic capacitors are recommended due to their low esr. ensure that the capacitor maintains its capaci - tance over temperature and dc bias. generally ceramic capacitors with x5r or x7r temperature characteristics perform well. note that some small size ceramic capaci- tors fail to maintain their capacitance when a dc bias is applied and should be avoided. place the capacitors as close as possible to the ic. the recommended input and output capacitor values are shown in figure 1, however, larger value capacitors can be used to further reduce ripple at the expense of size and higher cost. compensation the out1 step-up converter is compensated for sta - bility through an external compensation network from comp1 to ground. a 2200pf ceramic capacitor is rec - ommended. the out2 led driver is compensated for stability through an external compensation network from comp2 to ground. a 0.22 ff ceramic capacitor is recommended for most applications. higher c comp2 values increase soft-start duration, as well as the time delay between enabling the step-up converter to initiating soft-start. see the soft-start out2 section for more information. table 23. recommended inductors for l2 manufacturer part inductance (h) dcr (mi) i sat (a) dimensions (l typ x w typ x h max ) (mm) cooper (coiltronics) sd3114 2.2 110 1.74 3.0 x 3.0 x 1.45 fdk mipf2520 2.2 80 1.3 2.5 x 2.0 x 1.0 mipw3226 2.2 100 1.1 3.2 x 2.6 x 1.0 tdk vls3012et vls3010t 2.2 10 80 390 1.35 0.65 3 x 3 x 1.2 3 x 3 x 1.0 toko de2812c 2.7 75 1.8 3.0 x 3.2 x 1.2 de2812c 10 325 0.78 3.0 x 3.2 x 1.2 manufacturer part inductance (h) dcr (mi) i sat (a) dimensions (l typ x w typ x h max ) (mm) toko 1098as-100m 10 290 0.75 2.8 x 3.0 x 1.2 1069as-220m 22 570 0.47 3 x 3 x 1.8 fdk mip3226d100m 10 160 0.9 3.2 x 2.6 x 1.0 maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
43 diode selection the out2 led converter uses an external rectifier diode. a schottky diode is recommended due to its fast recov- ery time and low forward voltage drop. ensure that the diodes average and peak current rating exceeds the average output current and peak inductor current. in addition, the diodes reverse breakdown voltage must exceed the maximum v out2 . pcb layout due to fast switching waveforms and high current paths, careful pcb layout is required. minimize trace lengths between the ic and the inductor, the diode, the input capacitor, and the output capacitor. minimize trace lengths between the input and output capacitors and the ics ground terminal, and place input and output capaci- tor grounds as close together as possible. use separate power ground and analog ground copper areas, and connect them together at the output capacitor ground. keep traces short, direct, and wide. keep noisy traces, such as the lx_ node trace, away from sensitive analog circuitry. for improved thermal perfor- mance, maximize the copper area of the lx_ and pgnd_ traces. refer to the MAX8939/MAX8939a/MAX8939b evaluation kit for an example layout. typical operating circuit chip information process: bicmos MAX8939 MAX8939a MAX8939b dc/usb usb transceiver broadband processor display backlight keypad backlight chg_mon batt pwr_on_cmp scl sda irq reset_in lx2 out2 pgnd2 comp2 led1 led2 chg chg_in safe_out batt lx1 pgnd1 comp1 led3 open 1 f 10 f 1 f 10 f li+ battery 2200pf 1 f 1 f 0.22 f 22 h 22 f to system load out1 22 f 5v/700ma audio amplifier vibrator ldo1 4.7 f 2.9v/400ma ldo4 ldo1_en emmc_en 1 f analog 2.8v/100ma mmc card ldo2 22 f digital supply 1.8v/200ma analog 2.8v/200ma bluetooth/fmr combo, gps camera batt ldo3 22 f pwm switch driver invib 1 f outvib ref agnd 1 f display 0.1 f maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
44 package type package code outline no. land pattern no. 30 wlp w302a3+2 21-0016 refer to application note 1891 package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. e d aaaa pin 1 indicator marking a3 a2 a1 a see note 7 0.05 s s e d1 e1 b se sd 0.05 m s ab b a side view a top view bottom view a 1 1 package outline 30 bumps, wlp pkg. 0.5mm pitch 21-0016 f 0.64 0.24 0.40 0.025 0.31 2.00 2.50 0.50 0.00 0.25 w303b3+1 3.205 0.015 3.005 0.015 64 53 2 e c d b w303a3+1 3.000 0.050 3.260 0.050 w302a3+2 3.030 0.080 2.520 0.080 w302a3+1 3.065 0.015 2.565 0.015 w303c3+1 3.005 0.015 3.415 0.015 title document control no. rev. 1 1 approval common dimensions a a2 a1 a3 b e1 d1 e sd se 0.05 0.03 0.03 basic ref basic e d pkg. code depopulated bumps b2, b3, b4, c2, c3, c4, d2,d3, d4, d5 notes: 1. terminal pitch is defined by terminal center to center value. 2. outer dimension is defined by center lines between scribe lines. 3. all dimensions in millimeter. 4. marking shown is for package orientation reference only. 5. tolerance is 0.02 unless specified otherwise. 6. all dimensions apply to pbfree (+) package codes only. 7. front - side finish can be either black or clear. basic basic - drawing not to scale - none none none none maxim integrated system power management for mobile handset MAX8939/MAX8939a/MAX8939b
maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated 160 rio robles, san jose, ca 95134 usa 1-408-601-1000 45 ? 2012 maxim integrated maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. revision history revision number revision date description pages changed 0 5/11 initial release 1 11/11 added MAX8939a to data sheet 1C43 2 1/12 revised ldo output accuracy, added charge on/off control section, updated figure 3 5C8, 19, 20, 21 3 2/12 added new note 3 to electrical characteristics table 2C8 4 11/12 added MAX8939b to data sheet, corrected vset voltage, updated tocs21 and 22, updated figure 3, updated tables 10, 15, and 16 1C45 5 12/12 updated lx1, led1, and out2 specs 6, 8 system power management for mobile handset MAX8939/MAX8939a/MAX8939b


▲Up To Search▲   

 
Price & Availability of MAX8939

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X